Semiconductor device and manufacturing method thereof

ABSTRACT

A first insulation film is made of a silicon material and is provided on a semiconductor base. A second insulation film is made of an organic material and is provided on the first insulation film. The second insulation film is thicker than the first insulation film. A third insulation film is thinner than the second insulation film and is provided on the second insulation film. The third insulation film is made of a silicon material and has a moisture resistance property. A fourth insulation film is made of an organic material. The fourth insulation film is provided on the third insulation film to prevent a damage on the third insulation film. A wiring layer is provided on the fourth insulation film.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor device and amanufacturing method thereof.

[0003] 2. Description of the Related Art

[0004] A conventional semiconductor device for current detection useincluding a Hall element is disclosed in, for example, UnexaminedJapanese Patent Application KOKAI Publication No. 2001-230467.

[0005]FIG. 1 is a diagram showing the structure of a conventionalsemiconductor device 101. As shown in FIG. 1, the semiconductor device101 comprises a semiconductor base 103 in which a Hall element 102 isformed, and a plate-like wiring layer 104 which is so provided as tosurround the Hall element 102 as viewed from the top.

[0006] The wiring layer 104 is connected to an unillustrated measurementtarget circuit to constitute a path for a measurement target current. Bya current flowing through the wiring layer 104, a magnetic field isformed around the wiring layer 104. The Hall element 102 detects themagnetic field formed around the wiring layer 104 by utilizing the Halleffect.

[0007] The wiring layer 104 is constituted by a U shape portion 105which partly surrounds the Hall element 102, and pad portions 107 towhich wires 106 to be connected to the measurement target circuit areconnected as viewed from the top. A current from the measurement targetcircuit is supplied via the wires 106 to the pad portion 107 on oneside, flows through the U shape portion 105 to reach the pad portion 107on the other side, and returns via the wires 106 to the measurementtarget circuit

[0008] Due to the current flowing through the U shape portion 105, astable and relatively strong magnetic field is applied to the Hallelement 102 arranged inside the U shape portion 105. The Hall element102 is used to detect a magnetic field applied thereto, to detectwhether there flows any current, or to measure the level of a current,by utilizing the Hall effect.

[0009] The wiring layer 104 is formed on the semiconductor base 103 viaan insulation film. Generally, an insulation film having a sufficientthickness is necessary in order to ensure a sufficient withstandvoltage. In many cases, an insulation film is made of a silicon materialsuch as silicon dioxide, etc. However, it is difficult to make aninsulation film made of a silicon material thick. To deal with thisproblem, there has been developed a method of stacking upon the siliconfilm, an organic film which is easy to make thick, such as a resin filmmade of polyimide resin.

[0010]FIG. 2 shows a sectional view of the semiconductor device 101comprising such an organic film. FIG. 2 shows a sectional view of thesemiconductor device 101 as sectioned along a line B-B shown in FIG. 1.As shown in FIG. 2, a thick organic film 108 is formed on a thin siliconoxide film 109 formed on the semiconductor base 103. The wiring layer104 is formed on the organic layer 108 and is therefore electricallyinsulated from the semiconductor base 103 by the organic film 108 andthe silicon oxide film 109. By forming the thick organic film 108, asufficiently high withstand voltage can be ensured. Also by forming thethick organic film 108, it is possible to flatten the surface on whichthe wiring layer 104 is formed and to realize a strong bonding strength.

[0011] In the above-described semiconductor device 101, the wiring layer104 is directly formed on the organic film 108. The wiring layer 104 ismade of metal such as copper, etc. Generally, metal and an organicmaterial can not adhere to each other strongly, which means that theorganic film 108 and the wiring layer 104 are easily separated from eachother. Therefore, the wiring layer 104 might be separated from theorganic film 108 in a wire bonding process or in a heating process.Accordingly, there is a problem that the above-described structure cannot achieve a semiconductor device having a high reliability.

[0012] The content of the above-mentioned Unexamined Japanese PatentApplication KOKAI Publication No. 2001-230467 is incorporated herein byreference.

SUMMARY OF THE INVENTION

[0013] Accordingly, it is an object of the present invention to providea semiconductor device having a high reliability and a manufacturingmethod thereof.

[0014] To achieve the above object, a semiconductor device according toa first aspect of the present invention comprises: a semiconductor base;a first insulation film which is provided on the semiconductor base andis made of a silicon material; a second insulation film which isprovided on the first insulation film, is made of an organic material,and is thicker than the first insulation film; a third insulation filmwhich is provided on the second insulation film, is made of a siliconmaterial, and is thinner than the second insulation film; and a wiringlayer which is provided on said third insulation film, wherein a currentflows between the wiring layer and an external terminal.

[0015] The semiconductor device may further comprise a fourth insulationfilm which is provided between said third insulation film and saidwiring layer so as to cover an entire surface of said third insulationfilm, and is made of an organic material.

[0016] The semiconductor device may further comprise a fifth insulationfilm which is provided between the fourth insulation film and the wiringlayer and is made of a silicon material.

[0017] The fifth insulation film may have a top view shape same as thatof the wiring layer.

[0018] The fourth insulation film may be made of polybenzoxazole resin.

[0019] The wiring layer may be made of metal.

[0020] The wiring layer may constitute a metal pad which is connected tothe external terminal, and/or a metal wire through which the currentflows via the metal pad.

[0021] A manufacturing method of a semiconductor device according to asecond aspect of the present invention comprises: a step of forming afirst insulation film made of a silicon material on a semiconductorbase; a step of forming a second insulation film made of an organicmaterial and thicker than the first insulation film on the firstinsulation film; a step of forming a third insulation film made of asilicon material and thinner than the second insulation film on thesecond insulation film; and a step of forming a wiring layer on thethird insulation film, wherein a current flows between the wiring layerand an external terminal.

[0022] The manufacturing method may further comprise a step of forming afourth insulation film made of an organic material and thinner than thethird insulation film between the third insulation film and the wiringlayer so as to cover an entire surface of the third insulation film.

[0023] The step of forming the wiring layer may include a step offorming a seed layer serving as a seed for growing a metal layer by aplating process, on the fourth insulation film; a step of forming aresist film on areas of the seed layer on which the wiring layer is notto be formed; a step of growing the metal layer by a plating process onareas of the seed layer that are not covered with the resist film; and astep of removing the resist film, and the seed layer beneath the resistfilm by etching.

[0024] The manufacturing method may further comprise a step of forming afifth insulation film made of a silicon material between the fourthinsulation film and the wiring layer.

[0025] The step of forming the fourth insulation film may include a stepof making the fourth insulation film of polybenzoxazole resin.

[0026] The wiring layer may constitute a metal pad which is connected tothe external terminal, and/or a metal wire through which the currentflows via the metal pad.

[0027] A semiconductor device according to a third aspect of the presentinvention comprises: a semiconductor base; a first insulation film whichis provided on the semiconductor base; a second insulation film which isprovided on the first insulation film and is thicker than the firstinsulation film; a third insulation film which is provided on the secondinsulation film and is made of a material having a moisture resistanceproperty; and a wiring layer which is provided on the third insulationfilm, wherein a current flows between the wiring layer and an externalterminal.

[0028] The semiconductor device may further comprise a fourth insulationfilm which is provided between the third insulation film and the wiringlayer so as to cover an entire surface of the third insulation film inorder to prevent the third insulation film from being damaged.

[0029] The semiconductor device may further comprise a fifth insulationfilm which is provided between the fourth insulation film and the wiringlayer to function as an adhesive layer for preventing separation of thewiring layer.

[0030] The fifth insulation film may have a top view shape same as thatof the wiring layer.

[0031] The fourth insulation film may function as an adhesive layer forpreventing separation of the wiring layer.

[0032] The fourth insulation film may be made of polybenzoxazole resin.

[0033] The wiring layer may be made of metal.

[0034] The wiring layer may constitute a metal pad which is connected tothe external terminal, and/or a metal wire through which the currentflows via the metal pad.

[0035] A manufacturing method of a semiconductor device according to afourth aspect of the present invention comprises: a step of forming afirst insulation film on a semiconductor base; a step of forming asecond insulation film thicker than the first insulation film on thefirst insulation film; a step of forming a third insulation film made ofa material having a moisture resistance property on the secondinsulation film; and a step of forming a wiring layer on the thirdinsulation film, wherein a current flows between the wiring layer and anexternal terminal.

[0036] The manufacturing method may further comprise a step of forming afourth insulation film for preventing a damage on the third insulationfilm between the third insulation film and the wiring layer so as tocover an entire surface of the third insulation film.

[0037] The step of forming the wiring layer may include: a step offorming a seed layer to serve as a seed for growing a metal layer by aplating process, on the fourth insulation film; a step of forming aresist film on areas of the seed layer on which the wiring layer is notto be formed; a step of growing the metal layer by a plating process onareas of the seed layer that are not covered with the resist film; and astep of removing the resist film and the seed layer beneath the resistfilm by etching while protecting the third insulation film by the fourthinsulation film.

[0038] The manufacturing method may further comprise a step of forming afifth insulation film to function as an adhesive layer for preventingseparation of the wiring layer, between the fourth insulation film andthe wiring layer.

[0039] The step of forming the fourth insulation film may include a stepof forming an insulation film which functions as an adhesive layer forpreventing separation of the wiring layer, as the fourth insulationfilm.

[0040] The step of forming the fourth insulation film may include a stepof making the fourth insulation film of polybenzoxazole resin.

[0041] The wiring layer may constitute a metal pad which is connected tothe external terminal, and/or a metal wire through which the currentflows via the metal pad.

BRIEF DESCRIPTION OF THE DRAWINGS

[0042] These objects and other objects and advantages of the presentinvention will become more apparent upon reading of the followingdetailed description and the accompanying drawings in which:

[0043]FIG. 1 is a top view of a conventional semiconductor device;

[0044]FIG. 2 is a sectional view of the semiconductor device shown inFIG. 1;

[0045]FIG. 3 is a sectional view of a semiconductor device having anadhesive layer;

[0046]FIG. 4 is a top view of a semiconductor device according to anembodiment of the present invention;

[0047]FIG. 5 is a sectional view of the semiconductor device shown inFIG. 4;

[0048]FIG. 6 is a top view of a Hall element region included in thesemiconductor device shown in FIG. 4;

[0049]FIG. 7A to FIG. 7D are diagrams showing manufacturing steps of thesemiconductor device shown in FIG. 4;

[0050]FIG. 8 is a diagram showing an alternative method of manufacturingthe semiconductor device according to the embodiment of the presentinvention; and

[0051]FIG. 9 is a diagram showing another structure of the semiconductordevice according to the embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0052] In order to prevent separation of the wiring layer 104 and theorganic film 108 in the conventional semiconductor device 101 shown inFIG. 1 and FIG. 2, it is conceivable that an adhesive layer be formedbetween the wiring layer 104 and the organic film 108.

[0053]FIG. 3 shows a sectional view of a semiconductor device 111comprising as an adhesive layer an insulation film 112 made of a siliconmaterial (for example, silicon nitride) between a wiring film 104 and anorganic film 108.

[0054] By providing the insulation film (adhesive layer) 112 between thewiring layer 104 and the organic film 108, it is possible to preferablyprevent separation of the wiring layer 104 in a wire bonding process orin a heating process. The insulation film 112 made of a silicon materialhas a moisture resistance property higher than that of the organic film108. Also because of this high moisture resistance property, a highreliability is expected of the semiconductor device 111.

[0055] The semiconductor device 111 shown in FIG. 3 is manufactured in amanner described below.

[0056] First, a silicon oxide film 109, the organic film 108, and theadhesive layer 112 are sequentially stacked on a semiconductor base 103.Then, a thin metal film 115 which is formed by stacking a titanium filmand a copper film is formed on the adhesive layer 112. The metal film115 is a seed layer for forming a thick metal film 116 by a platingprocess. The wiring layer 104 is constituted by the thin metal film 115and the thick metal film 116.

[0057] A resist film is formed on regions of the seed layer 115 otherthan regions where the wiring layer 104 is to be formed, exposing onlythe regions of the seed layer 115 where the wiring layer 104 is to beformed. The thick metal layer (plating layer) 116 made of copper is thenformed on the regions of the seed layer 115 that are not covered withthe resist film by a plating process. Lastly, the resist film and theseed layer 115 underneath the resist film are removed by etching. As aresult, the semiconductor device 111 having the structure shown in FIG.3 is achieved.

[0058] However, it is revealed that the semiconductor device 111 havingthe structure shown in FIG. 3 can not obtain such a high reliability (ahigh moisture resistance property) as expected.

[0059] In some case, according to the manufacturing method describedabove, the adhesive layer 112 beneath the seed layer 115 is also removedtogether when the seed layer 115 beneath the resist film is etched out.As described above, the adhesive layer 112 made of a silicon materialhas a high moisture resistance property. This means that theabove-described manufacturing method might cause a state that a part ofthe organic film 108 is not covered with the adhesive layer 112excellent in the moisture resistance property. Because of this, themoisture resistance property of the semiconductor device 111 isdeteriorated, and the semiconductor device 111 therefore hardly achievesa high reliability.

[0060] A semiconductor device according to an embodiment of the presentinvention, which is protected from separation of the wiring layer andhas a high moisture resistance property will now be explained below withreference to the drawings.

[0061]FIG. 4 is a top view of a semiconductor device 11 according to anembodiment of the present invention.

[0062] As shown in FIG. 4, the semiconductor device 11 comprises asemiconductor base 12 and a wiring layer 13.

[0063] The semiconductor base 12 is constituted by a p-type siliconsubstrate which is formed by epitaxial growth. The silicon substrate isformed into, for example, an approximately square shape, and has a Hallelement region 14 in the center thereof. Although not illustrated, aplurality of semiconductor circuit elements constituting an amplifiercircuit, a detector circuit, etc. are integrated on the semiconductorbase 12.

[0064] The wiring layer 13 is formed of a plate-like metal film which ispatterned into a predetermined shape, and constitutes a path of ameasurement target current. The wiring layer 13 comprises pad portions15 and a U shape portion 16.

[0065] The pad portions 15 are arranged at both ends of the U shapeportion 16, respectively. The pad portions 15 are connected to terminalsor the like (not illustrated) of a lead frame on which a measurementtarget circuit is mounted, via wires 17 made of metal. For example, acurrent from the measurement target circuit flows from one pad portion15 to the U shape portion 16, and further to the other pad portion 15and finally returns to the measurement target circuit

[0066] The U shape portion 16 is so provided as to surround at leastpartly the Hall element region 14 as viewed from the top. With a flow ofa measurement target current through the U shape portion 16, a stableand strong magnetic field is formed near the inside of the U shapeportion 16, i.e. the Hall element region 14. Because of this, highlysensitive and highly precise current detection (measurement) utilizingthe Hall effect becomes available in the Hall element region 14, as willbe described later.

[0067]FIG. 5 shows a sectional view of the semiconductor device 11 assectioned along a line A-A shown in FIG. 4. As shown in FIG. 5, the Hallelement region 14 is provided in the surface area of the semiconductorbase 12. A first insulation film 20, a first organic film 21, a secondinsulation film 22, a second organic film 23, a third insulation film 24and a wiring layer 13 are sequentially stacked on the semiconductor base12.

[0068] The Hall element region 14 is constituted by an n-typesemiconductor region 25 which is formed in the surface area of thep-type semiconductor base 12 by impurity diffusion FIG. 6 is a top viewshowing the specific structure of the Hall element region 14. As shownin FIG. 6, the n-type semiconductor region 25 is formed into anapproximately cross-shaped structure and comprises four branch portions25A, 25B, 25C, and 25D extending in four different directions. The widthof the branch portions 25A and 25B extending in a Y direction is largerthan the width of the branch portions 25C and 25D extending in an Xdirection.

[0069] The branch portions 25C and 25D are provided respectively with afirst and a second p-type semiconductor regions 26 and 27 which areopposed to each other. The first and second p-type semiconductor regions26 and 27 are formed by selectively implanting a p-type impurity intothe n-type semiconductor region 25.

[0070] A first and a second n⁺-type semiconductor regions 28 and 29whose impurity concentration is higher than that of the n-typesemiconductor region 25 are formed in the first and second p-typesemiconductor regions 26 and 27, respectively. As shown in FIG. 5 andFIG. 6, the first and second n⁺-type semiconductor regions 28 and 29have their respective parts of their surfaces opposed to each otherprotruding from the first and second p-type semiconductor regions 26 and27 to contact the n-type semiconductor region 25. The contact areas ofthe first and second n⁺-type semiconductor regions 28 and 29 and then-type semiconductor region 25 are restricted by the first and secondp-type semiconductor regions 26 and 27 surrounding the first and secondn⁺-type semiconductor regions 28 and 29.

[0071] Exposed surfaces of the first and second n⁺-type semiconductorregions 28 and 29 make ohmic contact with a first and a secondelectrodes 30 and 31. The first and second electrodes 30 and 31 areconnected to an unillustrated detector circuit.

[0072] On the other hand, the branch portions 25A and 25B extending inthe Y direction are provided respectively with a third and a fourthn⁺-type semiconductor regions 32 and 33 having an impurity concentrationhigher than that of the n-type semiconductor region 25 and so formed asto be opposed to each other. The third and fourth n⁺-type semiconductorregions 32 and 33 are formed over almost the entire width of the branchportions 25A and 25B. The third and fourth n⁺-type semiconductor regions32 and 33 are formed by selectively implanting an n-type impurity on then-type semiconductor region 25 having the same “n-type” characteristic.

[0073] Exposed surfaces of the third and fourth n⁺-type semiconductorregions 32 and 33 are connected to unillustrated electrodesrespectively, and further to an unillustrated current supply circuit viathe electrodes. At the time of current detection, the current supplycircuit supplies a current I₀. The supplied current I₀ flows through then-type semiconductor region 25 between the third n⁺-type semiconductorregion 32 and the fourth n⁺-type semiconductor region 33 in, forexample, a direction indicated by an arrow in FIG. 6. The direction offlow of the current I₀ may be opposite.

[0074] As shown in FIG. 5, the first insulation film 20 is constitutedby two insulation films 20A and 20B, and is formed on the semiconductorbase 12. The insulation film 20A insulates the first and secondelectrodes 30 and 31 connected to the first and second n⁺-typesemiconductor regions 28 and 29 from the semiconductor base 12. Theinsulation film 20B covers the first and second electrodes 30 and 31.The first insulation film 20 (insulation films 20A and 20B) is made of asilicon material such as silicon dioxide, for example. The firstinsulation film 20 is formed by CVD (Chemical Vapor Deposition) or thelike so as to have an overall thickness of, for example, 2 μm.

[0075] The first organic film 21 is formed on the first insulation film20. The first organic film 21 is made of polyimide resin, such as PIQ(Polyimide Isoindro Quinazolinedione, a registered trademark of HitachiChemical Co., Ltd.). The first organic film 21 is formed on the firstinsulation film 20 by spin-coating or the like, so as to have athickness larger than that of the first insulation film 20, for example,a thickness of 5 μm.

[0076] The first insulation film 20 made of a silicon material welladheres to both of the semiconductor base 12 made of silicon and thefirst organic film 21 made of polyimide resin. Therefore, the firstinsulation film 20 serves as an adhesive layer for preventing separationof the semiconductor base 12 and the first organic film 21.

[0077] The first organic film 21 has a high withstand voltage. Becauseof this, by forming the first organic film 21 thick, a high withstandvoltage can be obtained between the semiconductor base 12 and the wiringlayer 13. Further, the first organic film 21 flattens the surface onwhich the wiring layer 13 is to be formed, and relieves an impact to betransmitted to the semiconductor base 12 in a wire bonding process byabsorbing a stress applied to the pad portions 15 of the wiring layer13.

[0078] The second insulation film 22 is formed on the first organic film21. The second insulation film 22 is made of a silicon material such assilicon nitride, for example. The second insulation film 22 is formed byplasma CVD or the like, so as to have a smaller thickness than that ofthe first organic film 21, for example, a thickness of 0.5 μm.

[0079] The second insulation film 22 made of a silicon material issuperior to the first organic film 21 made of an organic material inmoisture resistance property. Therefore, it is possible to realize ahigh moisture resistance property by covering the first organic film 21with the second insulation film 22, even if the first organic film 21had some moisture absorption property.

[0080] The second organic film 23 is formed on the second insulationfilm 22. The second organic film 23 is made of the same material, andformed by the same method as the first organic film 21.

[0081] The second organic film 23 is provided for preventing the secondinsulation film 22 from being removed in an etching process which isperformed in forming the wiring layer 13. By providing the secondorganic film 23, the first organic film 21 remains completely coveredwith the second insulation film 22 after the etching process. As aresult, a high moisture resistance property can be maintained after theetching process.

[0082] The second organic film 23 is formed thinner than the firstorganic film 21. To be more specific, the second organic film 23 needsonly to have a thickness that is sufficient for protecting the secondinsulation film 22 without fail in the etching process performed informing the wiring layer 13. For example, the second organic film 23 hasa thickness of approximately 1 μm.

[0083] The third insulation film 24 is made of silicon nitride, andprovided between the wiring layer 13 and the second organic film 23. Asillustrated, the third insulation film 24 has the same top view shape asthat of the wiring layer 13. The bottom surface of the third insulationfilm 24 directly contacts the second organic film 23. The thirdinsulation film 24 adheres well to both of the second organic film 23made of an organic material and the wiring layer 13 made of metal. Thatis, the third insulation film 24 functions as an adhesive layer forpreventing separation of the wiring layer 13 and the second organic film23.

[0084] The third insulation film 24 is formed thinner than the firstorganic film 21. Specifically, the third insulation film 24 needs onlyto have a thickness sufficient for preventing separation of the wiringlayer 13 and the second organic film 23 without fail. For example, thethird insulation film 24 has a thickness of approximately 0.1 μm.

[0085] The wiring layer 13 is formed on the third insulation film 24.The wiring layer 13 is constituted by sequentially stacking atitanium/copper layer 13 a, a copper-plated layer 13 b, and a gold layer13 c.

[0086] The titanium/copper layer 13 a is formed on the third insulationfilm 24 to have a thickness of, for example, 0.2 μm. The titanium/copperlayer 13 a is constituted by a stacked layer including a titanium filmand a copper film which are formed by an electron beam evaporationmethod or the like. The titanium/copper layer 13 a is a seed layerserving as a seed for growing the copper-plated layer 13 b by a platingprocess.

[0087] The copper-plated layer 13 b is formed on the titanium/copperlayer 13 a to have a thickness of, for example, 50 μm. The copper-platedlayer 13 b is formed by a plating process which utilizes thetitanium/copper layer 13 a as a seed layer.

[0088] The gold layer 13 c is formed on the copper-plated layer 13 b bya plating process or the like. The gold layer 13 c has a thickness of,for example, 3 μm.

[0089] As described above, the third insulation film 24 made of siliconnitride serves as an adhesive layer for preventing separation of thewiring layer 13 and the second organic film 23.

[0090] Generally, an organic material and metal poorly adhere to eachother. Therefore, if the wiring layer 13 is directly formed on thesecond organic film 23, the wiring layer and the second organic film 23might be separated from each other in a wire bonding process and aheating process. However, the third insulation film 24 well adheres toboth of the second organic film 23 made of an organic material and thewiring layer 13 made of metal. Accordingly, by providing the thirdinsulation layer 24 between the wiring layer 13 and the second organicfilm 23, it is possible to prevent separation of the wiring layer 13 andthe second organic film 23 in a wire bonding process and in a heatingprocess.

[0091] As described above, the wiring layer 13 is formed such that the Ushape portion 16 surrounds the Hall element region 14 as seen from thetop. Further, as shown in FIG. 5, the U shape portion 16 of the wiringlayer 13 exists above the Hall element region 14.

[0092] A measurement target current flowing through the wiring layer 13is detected in a manner described below.

[0093] While the semiconductor device 11 works, a current I₀ suppliedfrom an unillustrated current supply circuit flows through the n-typesemiconductor region 25 between the first electrode 30 and the secondelectrode 31, as shown in FIG. 6. Note that in FIG. 5, the current I₀flows in the direction perpendicular to the sheet.

[0094] Further, a measurement target current having a level of, forexample, approximately 5A and supplied from an unillustrated measurementtarget circuit flows through the wiring layer 13.

[0095] When the measurement target current flows through the U shapeportion 16 of the wiring layer 13, a stable and strong magnetic field isformed inside the U shape portion 16 as seen from the top, i.e. near theHall element region 14. This magnetic field orthogonally crosses thecurrent I₀ flowing through the n-type semiconductor region 25 of theHall element region 14. Accordingly, a Lorentz force acts on theelectrons of the Hall element region 14 (n-type semiconductor region 25)in a direction orthogonal to both of the magnetic field and the currentI₀. Such a so-called Hall effect causes a potential difference (Hallvoltage) between the first n⁺-type semiconductor region 28 and thesecond n⁺-type semiconductor region 29 formed in the branch portions 25Cand 25D of the n-type semiconductor region 25.

[0096] The caused potential difference is detected by an unillustrateddetector circuit which is connected to the first and second n⁺-typesemiconductor regions 28 and 29 via the first and second electrodes 30and 31. The detector circuit finds out whether there flows anymeasurement target current, and if any, obtains the level of themeasurement target current based on the detected potential difference.The obtained data is supplied, for example, to the measurement targetcircuit as feedback data.

EXAMPLE

[0097] The above-described semiconductor device 11 was manufactured inthe manner described below, and its interconnection strength (sharestrength) after it was subjected to a wire bonding process was measured.The measurement result will also be shown below.

[0098] First, as shown in FIG. 7A, the semiconductor base 12 is preparedwhich has the Hall element region 14 (Hall element), etc. formed in itssurface area and whose surface is covered with the first insulation film20. Next, as shown in FIG. 7B, a PIQ film to constitute the firstorganic film 21 is formed on the first insulation film 20 byspin-coating. Then, a silicon nitride film to constitute the secondinsulation film 22 is formed on the first organic film 21 by plasma CVD.

[0099] A PIQ film to constitute the second organic film 23 is formed onthe second insulation film 22 by spin-coating. Further, a siliconnitride film to constitute the third insulation film 24 is formed on thesecond organic film 23 by plasma CVD. Then, a titanium layer 41A and acopper layer 41B are sequentially formed on the third insulation film 24by an electron beam evaporation method. The above-describedtitanium/copper layer (seed layer) 13 a is obtained by patterning thetitanium layer 41A and the copper layer 41B into a predetermined shape.

[0100] Then, as shown in FIG. 7C, a photoresist film 42 having apredetermined pattern is formed on the copper layer 41B. The areas onwhich the photoresist film 42 is not formed substantially correspond tothe areas on which the wiring layer 13 is to be formed.

[0101] Then, as shown in FIG. 7D, the copper-plated layer 13 b is formedon the copper layer 41B by a copper plating process. The gold layer 13Cis then formed on the copper-plated layer 13 b by a gold platingprocess.

[0102] Afterwards, the photoresist film 42, and the titanium layer 41A,the copper layer 41B, and the third insulation film 24 beneath thephotoresist film 42 are removed by etching. As a result, thesemiconductor device 11 having the structure shown in FIG. 5 iscompleted.

[0103] Note that the semiconductor device 111 having the structure shownin FIG. 3 can be manufactured by omitting the process of forming thesecond organic film 23 and the third insulation film 24 from themanufacturing method for the semiconductor device 11 described above.

[0104] As described above, the second organic film 23 is formed on thesecond insulation film 22. This prevents the second insulation film 22from being damaged when the photoresist film 42, the titanium layer 41A,the copper layer 41B, and the third insulation film 24 are etched,enabling realization of a high moisture resistance property of thesemiconductor device 11. Further, since the thick first organic film 21is formed between the semiconductor base 12 and the wiring layer 13, ahigh withstand voltage can be achieved in the semiconductor device 11.Accordingly, it is possible to realize a high reliability of thesemiconductor device 11.

[0105] Next, the wires 17 were connected to the pad portions 15 of thewiring layer 13 by wire bonding, and the share strength of the wires 17was tested. Note that measurement of share strength was conducted on thesemiconductor device 11 which was manufactured in the above-describedmanner, and on a semiconductor device in which a wiring layer isdirectly formed on an organic film (i.e. a semiconductor device whichdoes not comprise the above-described third insulation film 24 or asemiconductor device which does not comprise the second insulation film22, the second organic film 23, and the third insulation film 24described above).

[0106] The share strength of the semiconductor device 11 manufactured inthe above-described manner was approximately 16.7N (1700 gf). On theother hand, the share strength of the semiconductor device in which awiring layer is directly formed on an organic film was approximately5.88N(600 gf).

[0107] It is obvious from these measurement results that a sharestrength can be obtained which is approximately three times as large asthat obtained in a case where a wiring layer is directly formed on anorganic film, by providing the second insulation film 22 and thirdinsulation film 24 which function as adhesive layers.

[0108] As explained above, since the semiconductor device 11 comprisesthe second insulation film 22 which functions as an adhesive layerbetween the first organic film 21 and the second organic film 23, andthe third insulation film 24 which functions as an adhesive layerbetween the second organic film 23 and the wiring layer 13, the wiringlayer 13 can be prevented from being separated in a wire bonding processand in a heating process. Therefore, it is possible to achieve thesemiconductor device 11 having a high reliability.

[0109] Since the semiconductor device 11 comprises the thick firstorganic film 21, it is possible to relieve the impact to be applied inthe wire bonding process and to achieve a high withstand voltage in thesemiconductor device 11.

[0110] Further, since the semiconductor device 11 comprises the secondorganic film 23 for protecting the second insulation film 22, the firstorganic film 21 having a high moisture absorption property is securelycovered with the second insulation film 22 having a high moistureresistance property even after an etching process is performed. Thismakes it possible to achieve the semiconductor device 11 having a highmoisture resistance property and thus a high reliability.

[0111] In the above-described embodiment, the second insulation film 22and third insulation film 24 functioning as adhesive layers are made ofsilicon nitride. However, the second insulation film 22 and the thirdinsulation film 24 may be made of other silicon materials, for example,silicon dioxide or silicon oxide nitride. However, it is preferred thatthe second insulation film 22 be made of silicon nitride, in order toachieve a high moisture resistance property (waterproofness).

[0112] In the above-described embodiment, the first organic film 21 andthe second organic film 23 are made of polyimide resin. However, thefirst organic film 21 and the second organic film 23 may be made ofother organic insulation materials.

[0113] A shield layer for restricting noise may be provided between thefirst organic film 21 and the semiconductor base 12 in order to restrictnoise.

[0114] A crack is easily caused in the silicon nitride film constitutingthe second insulation film 22, due to a difference in coefficient oflinear expansion from other films. Therefore, in order to manufacture aplurality of semiconductor devices 11 out of a semiconductor wafer, thesecond insulation film 22 may not be formed all over the entire surfaceof the semiconductor wafer, but may be formed separately in each regionin which the semiconductor device 11 is to be formed, as shown in FIG.8.

[0115] The third insulation film 24 described above may be omitted. Inthis case, the second organic film 23 may be made of polybenzoxazole(PBO) resin, as shown in FIG. 9. PBO resin is excellent in moistureresistance property and has a strong adhesiveness to a metal film Thesemiconductor device 11 having the structure shown in FIG. 9 can bemanufactured by omitting the process of forming the third insulationfilm 24 from the manufacturing method for the semiconductor device 11having the structure shown in FIG. 4.

[0116] The second insulation film 22 and third insulation film 24described above may be constituted by a plurality of films. For example,the second insulation film 22 and the third insulation film 24 may beconstituted by stacking a silicon nitride film and a silicon oxide film.

[0117] In the above-described embodiment, the case where the wiringlayer 13 is constituted by the pad portions 15 and the U shape portion16 is explained as an example. However, the wiring layer 13 mayconstitute either the pad portions 15 or the U shape portion 16. Inother words, the pad portions 15 functioning as metal pads to which thewires 17 are connected, and the U shape portion 16 functioning as awiring (metal wire) through which a measurement target current flows,may be constituted by wiring layers 13 different from each other. Inthis case, the pad portions 15 and the U shape portion 16 may beconnected to each other by, for example, a bonding wire. Or, the U shapeportion 16 may be formed in a layer under the pad portions 15, and theboth may be connected to each other via, for example, a contact hole.These are also applicable to the wiring layer 104 shown in theembodiment.

[0118] Further, in the explanation so far, the semiconductor device 11for detecting (measuring) a current by utilizing a Hall effect wasdescribed as an example. However, the present invention can be appliedto any semiconductor device if it has a structure obtained by stackingan organic film made of an organic insulation material and a metal filmmade of metal. For example, the present invention can be applied to asemiconductor device having a power element or the like, and to amultilayer printed circuit board having a pad on its surface.

[0119] Various embodiments and changes may be made thereunto withoutdeparting from the broad spirit and scope of the invention. Theabove-described embodiment is intended to illustrate the presentinvention, not to limit the scope of the present invention. The scope ofthe present invention is shown by the attached claims rather than theembodiment. Various modifications made within the meaning of anequivalent of the claims of the invention and within the claims are tobe regarded to be in the scope of the resent invention.

[0120] This application is based on Japanese Patent Application No.2002-351740 filed on Dec. 3, 2002 and including specification, claims,drawings and summary. The disclosure of the above Japanese PatentApplication is incorporated herein by reference in its entirety.

What is claimed is:
 1. A semiconductor device comprising: asemiconductor base; a first insulation film which is provided on saidsemiconductor base and is made of a silicon material; a secondinsulation film which is provided on said first insulation film, is madeof an organic material, and is thicker than said first insulation film;a third insulation film which is provided on said second insulationfilm, is made of a silicon material, and is thinner than said secondinsulation film; and a wiring layer which is provided on said thirdinsulation film, wherein a current flows between said wiring layer andan external terminal.
 2. The semiconductor device according to claim 2,further comprising a fourth insulation film which is provided betweensaid third insulation film and said wiring layer so as to cover anentire surface of said third insulation film, and is made of an organicmaterial.
 3. The semiconductor device according to claim 2, furthercomprising a fifth insulation film which is provided between said fourthinsulation film and said wiring layer and is made of a silicon material.4. The semiconductor device according to claim 3, wherein said fifthinsulation film has a top view shape same as that of said wiring layer.5. The semiconductor device according to claim 2, wherein said fourthinsulation film is made of polybenzoxazole resin.
 6. The semiconductordevice according to claim 1, wherein said wiring layer is made of metal.7. The semiconductor device according to claim 6, wherein said wiringlayer constitutes a metal pad which is connected to said externalterminal, and/or a metal wire through which the current flows via saidmetal pad.
 8. A manufacturing method of a semiconductor devicecomprising: a step of forming a first insulation film made of a siliconmaterial on a semiconductor base; a step of forming a second insulationfilm made of an organic material and thicker than said first insulationfilm on said first insulation film; a step of forming a third insulationfilm made of a silicon material and thinner than said second insulationfilm on said second insulation film; and a step of forming a wiringlayer on said third insulation film, wherein a current flows betweensaid wiring layer and an external terminal.
 9. The manufacturing methodof a semiconductor device according to claim 8, further comprising astep of forming a fourth insulation film made of an organic material andthinner than said third insulation film between said third insulationfilm and said wiring layer so as to cover an entire surface of saidthird insulation film.
 10. The manufacturing method of a semiconductordevice according to claim 9, wherein said step of forming said wiringlayer includes: a step of forming a seed layer serving as a seed forgrowing a metal layer by a plating process, on said fourth insulationfilm; a step of forming a resist film on areas of said seed layer onwhich said wiring layer is not to be formed; a step of growing saidmetal layer by a plating process on areas of said seed layer that arenot covered with said resist film; and a step of removing said resistfilm, and said seed layer beneath said resist film by etching.
 11. Themanufacturing method of a semiconductor device according to claim 10,further comprising a step of forming a fifth insulation film made of asilicon material between said fourth insulation film and said wiringlayer.
 12. The manufacturing method of a semiconductor device accordingto claim 9, wherein said step of forming said fourth insulation filmincludes a step of making said fourth insulation film of polybenzoxazoleresin.
 13. The manufacturing method of a semiconductor device accordingto claim 8, wherein said wiring layer constitutes a metal pad which isconnected to said external terminal, and/or a metal wire through whichthe current flows via said metal pad.
 14. A semiconductor devicecomprising: a semiconductor base; a first insulation film which isprovided on said semiconductor base; a second insulation film which isprovided on said first insulation film and is thicker than said firstinsulation film; a third insulation film which is provided on saidsecond insulation film and is made of a material having a moistureresistance property; and a wiring layer which is provided on said thirdinsulation film, wherein a current flows between said wiring layer andan external terminal.
 15. The semiconductor device according to claim14, further comprising. a fourth insulation film which is providedbetween said third insulation film and said wiring layer so as to coveran entire surface of said third insulation film in order to prevent saidthird insulation film from being damaged.
 16. The semiconductor deviceaccording to claim 15, further comprising a fifth insulation film whichis provided between said fourth insulation film and said wiring layer tofunction as an adhesive layer for preventing separation of said wiringlayer.
 17. The semiconductor device according to claim 16, wherein saidfifth insulation film has a top view shape same as that of said wiringlayer.
 18. The semiconductor device according to claim 15, wherein saidfourth insulation film functions as an adhesive layer for preventingseparation of said wiring layer.
 19. The semiconductor device accordingto claim 18, wherein said fourth insulation film is made ofpolybenzoxazole resin.
 20. The semiconductor device according to claim14, wherein said wiring layer is made of metal.
 21. The semiconductordevice according to claim 20, wherein said wiring layer constitutes ametal pad which is connected to said external terminal, and/or a metalwire through which the current flows via said metal pad.
 22. Amanufacturing method of a semiconductor device comprising: a step offorming a first insulation film on a semiconductor base; a step offorming a second insulation film thicker than said first insulation filmon said first insulation film; a step of forming a third insulation filmmade of a material having a moisture resistance property on said secondinsulation film; and a step of forming a wiring layer on said thirdinsulation film, wherein a current flows between said wiring layer andan external terminal.
 23. The manufacturing method of a semiconductordevice according to claim 22, further comprising a step of forming afourth insulation film for preventing a damage on said third insulationfilm between said third insulation film and said wiring layer so as tocover an entire surface of said third insulation film.
 24. Themanufacturing method of a semiconductor device according to claim 23,wherein said step of forming said wiring layer includes: a step offorming a seed layer to serve as a seed for growing a metal layer by aplating process, on said fourth insulation film; a step of forming aresist film on areas of said seed layer on which said wiring layer isnot to be formed; a step of growing said metal layer by a platingprocess on areas of said seed layer that are not covered with saidresist film; and a step of removing said resist film and said seed layerbeneath the resist film by etching while protecting said thirdinsulation film by said fourth insulation film.
 25. The manufacturingmethod of a semiconductor device according to claim 24, furthercomprising a step of forming a fifth insulation film to function as anadhesive layer for preventing separation of said wiring layer, betweensaid fourth insulation film and said wiring layer.
 26. The manufacturingmethod of a semiconductor device according to claim 23, wherein saidstep of forming said fourth insulation film includes a step of formingan insulation film which functions as an adhesive layer for preventingseparation of said wiring layer, as said fourth insulation film.
 27. Themanufacturing method of a semiconductor device according to claim 26,wherein said step of forming said fourth insulation film includes a stepof making said fourth insulation film of polybenzoxazole resin.
 28. Themanufacturing method of a semiconductor device according to claim 22,wherein said wiring layer constitutes a metal pad which is connected tosaid external terminal, and/or a metal wire through which the currentflows via said metal pad.